1. Field of the Invention
The present invention relates to methods for producing an electron source, an image-forming apparatus, and a wiring substrate, and to the electron source, the image-forming apparatus, and the wiring substrate produced using the production methods. Further, the invention concerns a method for forming an insulating layer for insulation between wires.
2. Related Background Art
In recent years the image-forming apparatus of a thin and flat type have been developed actively as display devices, because they were excellent in utilization of installation space. For example, liquid-crystal display devices are utilized as displays of portable personal computers or the like and thus already known well.
The liquid-crystal display devices, however, have the problems of dark images and narrow viewing angles. For this reason, emissive type displays have been drawing attention. Namely, the emissive type displays, such as plasma displays, vacuum fluorescent tubes, displays using the surface conduction electron-emitting devices, or the like, can present brighter images and wider viewing angles than the liquid-crystal display devices can.
Among such emissive type flat image-forming apparatus, attention is being drawn to the image-forming apparatus using the electron-emitting devices, particularly, to the image-forming apparatus using the surface conduction electron-emitting devices that permit emission of electrons in simple structure.
The surface conduction electron-emitting devices have been reported by M. I. Elinson et al. (Radio. Eng. Electron. Phys., 10, 1290, (1965)), and emission of electrons takes place when electric current is allowed to flow in parallel to the surface of a thin film of a small area formed on a substrate. Examples of the surface conduction electron-emitting devices include those using a thin film of SnO2 by Elinson et al. cited above, those using a thin film of Au (G. Dittmer: Thin Solid Films, 9, 317 (1972)), those using a thin film of In2O3/SnO2 (M. Hartwell and C. G. Fonstad: IEEE Trans. ED Conf., 519 (1975)), those using a thin film of carbon (Hisashi Araki et al.: Shinku, Vol. 26, No. 1, p22 (1983)), and so on.
FIGS. 4A and 4B show an example of the surface conduction electron-emitting device. FIG. 4A is a plan view of the structure of the device and FIG. 4B is a sectional view thereof. In these figures, numeral 201 designates an insulating substrate, 202 and 203 device electrodes for electric connection, 204 an electrically conductive, thin film, and 205 an electron-emitting region.
FIG. 6 is a schematic diagram to show an example of the image-forming apparatus using the electron source in which the surface conduction electron-emitting devices described above are arrayed in a matrix.
The structure of the device illustrated in FIGS. 4A and 4B is the structure of a unit element and the image-forming apparatus illustrated in FIG. 6 has the electron source in which a lot of such unit elements 5002 are arrayed on the substrate (rear plate) 5005 in correspondence to respective pixels. For permitting each device to be selected arbitrarily, X-directional wires 5003 and Y-directional wires 5004 are laid with an unrepresented, insulating layer in between on the substrate 5005, forming so-called matrix wiring. A glass is often used as the substrate 5005.
In the image-forming apparatus of FIG. 6, numeral 5006 denotes an outer frame, and 5007 a face plate. Each of connections between the outer frame 5006, the rear plate 5005, and the face plate 5007 is bonded (or sealed) with a bonding material such as a low-melting-point glass frit or the like not illustrated, thereby forming an airtight vessel 170 for maintaining the inside of the image display device under a vacuum.
A florescent film 5008 comprised of fluorescent substance is formed on the lower surface of the face plate 5007. A metal back 5009 of Al or the like is formed on the rear-plate-side surface of the fluorescent film 5008.
In the color display case, fluorescent materials (not illustrated) of the three primary colors, red (R), green (G), and blue (B), are laid separately. Further, a black material (not illustrated) is laid between the fluorescent materials of the respective colors forming the fluorescent film 5008.
The inside of the above airtight vessel is maintained in a vacuum of the pressure below 10xe2x88x924 Pa. The distance between the rear plate 5005 with the electron-emitting devices formed thereon and the face plate 5007 with the fluorescent film formed thereon, as described above, is usually kept in the range of several hundred xcexcm to several mm.
A method for driving the image-forming apparatus described above is as follows. A voltage is applied to each electron-emitting device 5002 via external terminals Dx1 to Dxm and Dy1 to Dyn and via the wires 5003, 5004, whereby each device 5002 emits electrons. At the same time as it, a high voltage of several hundred V to several kV is applied to the metal back 5009 via an external terminal Hv outside the vessel. This accelerates electrons emitted from each device 5002 to make them collide with the corresponding fluorescent material of each color. On this occasion, the fluorescent material is excited to emit light, thus displaying an image.
The electron source substrate (rear plate) provided with the above matrix wiring can be produced by a variety of production methods, one of which is a method of producing the device electrodes, wires, etc. all by photolithography.
The methods can also be selected from those of producing the electron source substrate by making use of printing techniques such as screen printing, offset printing, and so on. The printing methods are suitable for formation of large-area patterns and are very preferable, because they can readily form the array of many electron-emitting devices on the substrate.
For example, Japanese Patent Application Laid-Open Nos. 8-185818, 8-34110, 8-236017, 9-283061, etc., disclose the technology for producing the electron source substrate (rear plate) by the printing methods, the technology for forming the X-directional wires, interlayer insulating layer, and Y-directional wires by screen printing, and so on.
An example of the method of producing the electron source substrate, which is described in the above applications, will be described referring to FIGS. 7A to 7F.
First, pairs of device electrodes (202, 203) are formed in a matrix on the substrate (rear plate) 5005 (FIG. 7A). Then m X-directional wires 5003 are formed so as to connect the electrodes 202 in each column to a common wire, by printing a paste containing particles of an electroconductive material and baking it (FIG. 7B). Then insulating layers 5010 of a comb teeth shape are formed by printing a paste containing electrically insulating particles (glass particles) and baking it (FIG. 7C). Further, the Y-directional wires are formed on the respective insulating layers 5010 so as to connect the electrodes 203 in each row to a common wire, by printing a paste containing particles of an electroconductive material and baking it (FIG. 7D). Then electrically conductive films 204 are formed so that each film connects the device electrode 202 to the device electrode 203 (FIG. 7E). Finally, electric current is made to flow to the conductive films 204, whereby a gap is formed in part of each conductive film to form the electron-emitting region 205 (FIG. 7F).
Incidentally, in the case of the structure wherein the insulating layers are provided between the wires (at intersecting points), including the matrix wiring as disclosed in the above applications, the insulating layers need to have the insulation resistance of several Mxcexa9 or more between the upper and lower wires, as a matter of course. Therefore, no short should be allowed between the upper and lower wires because of a pinhole appearing in the insulating layer. It is, however, often the case to fail to prevent occurrence of the pinhole, particularly, where the insulating layers are formed using the printing methods. The xe2x80x9cformation of insulating layers by the printing methodxe2x80x9d stated herein means a sequential process of applying an insulating material, such as glass particles or the like, and baking it to couple (sinter) the particles with each other, thereby forming electrically insulative films.
Particularly, in the case of the electron source substrate with the matrix wiring, used in the aforementioned image-forming apparatus, the electron-emitting devices need to be formed in the same number as the number of pixels. Therefore, the number of intersecting points between the upper and lower wires, corresponding to the number of pixels, is several hundred thousands to several millions. It is conceivable to form the insulating layers in multi-layer structure by the printing method, in order to prevent a pinhole from appearing in the insulating layers at the intersecting points between the wires.
In cases wherein the insulating layers are formed in the multi-layer structure, using the printing method, they are formed as a stack of multiple layers in order from the bottom layer by repeatedly carrying out steps of applying and baking the paste containing insulating particles (glass particles). There were thus cases in which a bubble sealed in an insulating layer immediately below expanded into the upper insulating layer in the baking stage for formation of the upper insulating layer. Further, there were converse cases in which a bubble appearing during the baking of the upper insulating layer was coupled with a bubble in the lower insulating layer. As a result, as illustrated in FIG. 5, there were cases in which a pinhole became continuous throughout the entire insulating layer 5 formed as a stack of multiple layers. Therefore, the formation of the insulating layers in the multi-layer structure simply by use of the printing method was not enough to restrain the occurrence of shorts between the upper and lower wires at the intersecting points in certain cases.
FIG. 5 is a sectional, schematic diagram at an intersecting point of the matrix wiring, in which the lower wire 4, insulating layer 5 of the three-layer structure, and upper wire 6 are formed in order on the substrate 9.
In order to prevent the occurrence of the above pinhole, it is thus conceivable to carry out the baking step for formation of each insulating layer at a sufficiently higher temperature than a softening point of an insulating material (insulating particles (glass particles)) for the insulating layer. It is expected that this method can melt the above insulating material (the above insulating particles (glass particles)) well to fluidize it and fill up the pinhole appearing during the application or during the baking.
However, the baking at high temperature involves the possibility of exceeding the strain point of the glass used for the substrate and inducing irreversible deformation of the glass substrate. This sometimes resulted in making it impossible to form the upper wires on the insulating layers or disabling the substrate itself utterly because of too large strain deformation of the glass substrate. There were also cases in which the insulating material (the above insulating particles (glass particles)) was melted to flow during the baking at high temperature, so as to destroy the shape of the insulating layers already having been patterned with high accuracy and in turn fail to achieve expected accuracy. Further, it is possible to use a special glass with a high strain point resistant to the baking at high temperature, for the substrate, but the use of the special glass increases the cost and lowers competitiveness of products.
Conversely, in order to avoid the use of high-cost glass, it is also conceivable to employ a method of using the insulating material (insulating particles (glass particles)) with a very low softening point for the insulating layers and baking the material at a relatively low temperature though being higher than the softening point. However, such insulating materials with very low softening points (insulating particles (glass particles)) usually include a high content of PbO or ZnO. It is thus difficult to assure the predetermined insulation resistance between the upper and lower wires, and they are often unapplicable to the insulating layers.
The present invention has been accomplished in view of the above problems and an object of the present invention is to provide a method for producing a wiring substrate, while restraining the continuous growth of the pinhole and preventing the short defect between the upper and lower wires, without using the substrate of the special material such as the high-strain-point glass or the like, in the formation of the insulating layers in the multi-layer structure by repeatedly carrying out the steps of applying (dispensing) and baking the insulating particles (glass particles). A further object of the present invention is to provide a method for producing a wiring substrate, while restraining alteration of the shape such as dullness or the like of the pattern of the insulating layers during the several baking steps. Another object of the invention is to provide a wiring substrate, an electron source, and an image-forming apparatus produced using the above production methods.
A method for producing a wiring substrate according to the present invention is a method comprising a step of forming a first wire on a substrate, a step of forming an insulating layer as a stack of M layers by repeatedly carrying out steps of laying and baking an insulating material M times (M is an integer satisfying Mxe2x89xa73), on the first wire, and a step of forming a second wire on the insulating layer,
wherein an N-th insulating material used in formation of an insulating layer of the N-th layer (N is an integer satisfying 2xe2x89xa6Nxe2x89xa6Mxe2x88x921) is baked at a temperature lower than a softening point of the N-th insulating material, and
wherein baking temperatures in formation of respective insulating layers from the (N+1)-th layer to the M-th layer are not more than the baking temperature in the formation of the insulating layer of the N-th layer.
The production method of the present invention permits the wiring substrate to be formed at low cost, with high reliability of electric insulation between wires, and without deformation of the pattern of insulating layers.